Engineering Journey
The through-line
The same instinct shows up in every role: find the work the system did not need to do. Scroll through four milestones to see how the problems changed and what carried over.
- Computer Engineering
- C++ / Media Processing
- Performance Engineering
- S3 / MXF
- Distributed Systems
- AI + IPC
- Systems Optimization
- Hardware-Assisted Verification
- Netlist Optimization
- Timing-Driven Resynthesis
4 milestones·6 case studies·every claim traced to a source
Journey
1/4·0/6
2018
Patiala, India
BE, Computer Engineering
Thapar Institute of Engineering & Technology
Where the fundamentals came from: algorithms, data structures, and the systems layer underneath them.
- Computer Engineering
2022
Noida, India
Software Engineer
Interra Systems
Backend engineering on an automated file-based media QC platform, focused on analysis throughput and cloud file access.
- C++ / Media Processing
- Performance Engineering
- S3 / MXF
- Distributed Systems
Work from this period
- Media processing and binary formatsReading less of the fileA multicore analysis pipeline was reading entire multi-gigabyte media files to compute information the container format already stored.
- Cloud storage performanceS3 read optimizationA file reader written for local disks behaves badly against object storage. Rebuilding it around parallel, chunked reads changed the access pattern rather than the code around it.
- Distributed systemsDistributed processing architectureTaking a single-machine media analysis engine and splitting one large job across a fleet of workers: queue, locking, ordered aggregation, and failure handling.
The optimization that defines this period: build the chunk map from container metadata instead of reading the essence.
2025
Noida, India
Senior Software Engineer
Interra Systems
Ownership widened from backend performance work to cross-boundary architecture and debugging across the whole stack.
- AI + IPC
- Systems Optimization
Work from this period
- AI integration and IPCAI language identification over IPCThe accurate model was Python-only and the product was C++. Three approaches were explored; the one that shipped moved the boundary instead of trying to erase it.
- Measurement and engineering judgmentExperiments and negative resultsFour times the obvious answer was wrong. Measuring first is the only reason that was discovered before shipping rather than after.
The architectural answer to a language boundary: each runtime keeps its own process, connected by a structured message layer.
2026
Bengaluru, India
Staff R&D Engineer
Synopsys
Moved from media verification into hardware verification: synthesis and optimization for a hardware-assisted emulation platform.
- Hardware-Assisted Verification
- Netlist Optimization
- Timing-Driven Resynthesis
The current problem: a local graph rewrite evaluated against timing, which is a property of the whole graph.
What builds on what
The same capabilities as a dependency graph rather than a timeline. Foundational work sits on the left; everything to the right of it was only reachable because of what came before.
Hover or focus a capability to trace what it builds on and where it leads. Nodes with a case study behind them link straight to it.
The language every system on this site is written in.
Algorithm design and the analysis that decides which one ships.
Producer/consumer pipelines, per-core work distribution, lock-free structures.
Traversal and topological ordering over very large directed graphs.
Container formats read at the byte level: MXF, MOV/MP4, and their sample tables.
Finding the work that did not need to happen, and measuring before deciding.
Job queues, distributed locking, ordered aggregation, failure handling.
Running inference outside the native process, across a structured message boundary.
Restructuring a mapped netlist without changing what it computes.
Current work: making timing constraints part of the restructuring decision.